The partnership will focus on enabling real-time and critical applications for safety, power supply, and computing efficiency on demanding platforms for the automotive, industrial, and data center markets. Motor control and data center power supply are key platforms for leveraging Cyient's analog mixed-signal capabilities and Atlas MIPS CPU IP.

“As computing systems move from the cloud to the edge, intelligent power delivery is becoming a key driver of performance and efficiency,” says Suman Narayan, CEO of Cyient Semiconductors. “Our collaboration with MIPS allows us to bring together embedded intelligence and advanced power architectures on custom silicon platforms built on a scalable, open foundation. Together, we are designing the semiconductors of tomorrow, specifically created for a more connected and energy-efficient world.”.

“The challenges of energy efficiency and motor control are real-time computing workloads for which the MIPS M8500 microcontrollers are the optimal choice,” says Sameer Wasson, executive director of MIPS. “Building on our best-in-class real-time efficiency and loop control performance, Cyient can bring its unique smart power delivery capabilities to custom ASIC and ASSP designs to create differentiated solutions that meet our customers’ unique needs in their target markets.”.

The demand for software-defined vehicles, data center infrastructure, and industrial automation is driving the growth of custom chips. Customers can create advanced, differentiated solutions that are easy to program using MIPS' advanced processor IP, based on the open RISC-V instruction set architecture, combined with Cyient's expertise in smart power design and mixed signals.

Target applications include motor control, intelligent energy management, power supply management, and safety-critical applications, offered as ASSP or ASIC platforms. Original equipment manufacturers (OEMs) and system integrators will benefit from faster time to market, avoiding reliance on proprietary products and optimizing platform costs.