The solution combines Teradyne's UltraFLEXplus platform with TEL's Prexa™ SDP (Singulated Device Prober) to offer factory-free designers, foundries, and OSATs a production-ready pathway that enables high-quality device selection at multiple points in the advanced packaging flow.
As AI device and data center architectures increasingly adopt chiplet-based designs that integrate multiple chips into a single 2.5D or 3D package, a single defective chip can compromise the entire high-value package. Adding KGD selection is essential to protect end-user performance, improve quality, and maximize production.
The joint solution from Teradyne and TEL offers a validated test cell designed to reduce integration risk in high-volume manufacturing. Within the test cell, Teradyne's UltraFLEXplus instruments are coordinated with TEL's Prexa SDP, which maintains the device temperature and manages the high power dissipation characteristics typical of cutting-edge AI silicon.
Based on an open ecosystem architecture, the solution offers customers flexibility in probe cards, manipulators, and complementary interface technologies, and can be integrated with other testers as needed.
“Innovation in AI devices is advancing at an unprecedented pace, and our customers need a reliable choice at every stage of advanced packaging,” said Shannon Poulin, president of Teradyne’s Semiconductor Test Group. “TEL’s industry-leading Prexa SDP, combined with Teradyne’s UltraFLEXplus, provides customers with a production-ready solution that covers single-device testing with the thermal accuracy, power density, and digital performance
required by today’s AI devices and data centers.”
The commercially available solution, developed by Teradyne in collaboration with TEL, represents a significant advancement in meeting the rigorous demands of AI device and data center manufacturing. By combining Teradyne's UltraFLEXplus platform with TEL's industry-leading Prexa SDP tester, customers gain access to a robust, production-ready KGD screening solution that helps ensure advanced 2.5D and 3D packages achieve the reliability and performance required for next-generation AI and data center architectures.
