These devices are designed to help systems architects comply with emerging cybersecurity regulations, such as the Cyber Resilience Act (CRA) in Europe and Commercial National Security Algorithm Suite 2.0 (CNSA 2.0) in the US, as well as meet the changing specifications of standards applied to the security of data centers, computing, defense, telecommunications and infrastructure.
The TS1800 integrated circuit functions as an external root of trust controller for the platform, providing secure boot, secure firmware updates, and certificate authentication and management using hardware-accelerated post-quantum cryptography. These accelerators employ algorithms standardized by the NIST (National Institute of Standards and Technology) such as ML DSA (Module Lattice-Based Digital Signature Algorithm), LMS (Leighton-Micali Signature) verification, and ML KEM (Module Lattice-Based Key Encapsulation Mechanism).
“The transition to post-quantum cryptography is no longer a topic of debate; however, its implementation presents a real challenge that is arriving much faster than many companies expected,” said Nuri Dagdeviren, corporate vice president of Microchip’s Secure Computing Group. “At Microchip, we are helping our customers address this challenge by making PQC available directly at the foundation of system trust, so that platforms can evolve securely as new threats and new regulations emerge.”.
The TS1800, which is based on a high-performance Arm® Cortex® M4F processor that reaches up to 192 MHz, can double the processing capacity of previous generations of Microchip's root of trust controllers, making it capable of meeting the computing demands of PQC workloads.
The improvements made to the architecture and the controller's optimizations maintain its efficient power consumption and support the advanced platform security features required by Open Compute Project (OCP) applications, such as secure boot, firmware integrity validation, accreditation, and lifecycle management. The addition of USB 2.0 (at full speed) significantly reduces firmware update times compared to I²C and SPI (Serial Peripheral Interface).
The TS50x family provides a PQC boot solution for systems that don't require all the OCP-based platform root of trust features included in the TS1800. TS50x devices have a simpler architecture, focusing solely on verifying PQC operations and using classic cryptography, such as P-384 ECC (Elliptic Curve Cryptography), over firmware boot signatures from an SPI Flash. These devices keep the main chipset in reboot mode until signature verification is successful. This hybrid approach allows enterprises to combine classic ECC cryptography with PQC.
The TS1800 and TS50x controllers support PQC and are compliant with requirements such as the NIST SP 800 193 platform resilience guidelines and new security initiatives. Part of the TrustFLEX designed for faster time to market, these fully compliant, modular crypto controllers help reduce the complexity and risk associated with upgrading cryptographic foundations across all platforms.
By offering hardware-based PQC capabilities at the root of trust, the TS1800 and TS50x controllers are ideal for PQC-based secure boot applications that run from the start, rather than relying on software-based solutions whose initial measures depend on traditional cryptography. The devices utilize Microchip's fourth-generation Soteria firmware on top of the Zephyr® RTOS, designed to adapt to new ecosystems and industry certification requirements
