The new R-Car H3 SoC, the first member of the third generation R-Car, offers CPU performance, image recognition processing, ISO 26262 (LEIA-B) compatibility and a SiP with external memory to enable a wide range of automotive applications.
The R-Car H3 boasts powerful automotive computing performance, surpassing that of its predecessor, the R-Car H2. This enables system manufacturers to utilize the new R-Car H3 as an automotive computing platform and play a key role in the era of autonomous driving.
To make the new device ideal for safe driving support systems, the R-Car H3 offers cognitive computing capabilities, enhanced computing performance that can accurately process large volumes of data from vehicle sensors in real time, and allows system manufacturers to run applications that require complex processing, such as obstacle detection, driver status recognition, hazard prediction, and risk prevention. To further accelerate the development of safe driving support systems, the R-Car H3 also conforms to the ISO 26262 (LEIA-B) standard for automotive safety functionality.
Furthermore, in vehicle infotainment systems, the need for connectivity between various systems and services, such as smartphones and cloud services, is growing. This has led to a significant increase in the volume of data transmitted from outside the system. Therefore, there is a demand for human-machine interface (HMI) computing power to accurately process these large amounts of data in real time. The outstanding performance of the R-Car H3 enables the design of excellent graphics for advanced and feature-rich HMI applications.
The R-Car H3 is an automotive computing platform, ideal for the era of autonomous driving with significantly improved cognitive computing and HMI computing capabilities for advanced driving support systems, as well as vehicle onboard infotainment systems.
The main features of the new H3 R-Car:
1) Support for a wide range of applications as an automotive computing platform.
To enable system manufacturers to use the R-Car H3 as an automotive computing platform, the new device boasts powerful computing performance superior to the R-Car H2. To accurately process large amounts of information in real time, the R-Car H3 is built around ARM® Cortex®-A57/A53 cores, employing ARM’s latest 64-bit CPU core architecture. A processing throughput of 40,000 DMIPS (Dhrystone million instructions per second (Note 1)) is achieved for increased processing power. The R-Car H3 also features the PowerVR™ GX6650 3D graphics engine to deliver reliable information to drivers at the right time.
The IMP-X5 on-chip programmable image recognition engine offers advanced image recognition technology in addition to the CPU and GPU. Exclusive to Renesas, the IMP-X5 is a recognition engine optimized for interoperability with the CPU. It offers four times the recognition performance of the previous PMI-X4 image recognition engine, integrated into the second-generation R-Car family.
The R-Car H3 is the world's first automotive SoC to adopt the 16nm process. With this high performance and compliance with the ISO26262 (LEIA-B) standard for automotive functional safety, the R-Car H3 can be used as an automotive computing platform supporting a wide range of applications, including advanced driver assistance systems and in-vehicle infotainment systems.
2) System-level performance improvement based on the results of rich infotainment systems in the vehicle.
Renesas achieves system performance exceeding past results. Specifically, by optimizing the internal bus architecture of the SoC and improving the bandwidth of the DDR memory, the R-Car H3 boasts four times the memory bandwidth compared to the R-Car H2, allowing the system manufacturer to run multiple applications.
Addressing the demand for higher resolution video playback on multiple screens, the R-Car H3 incorporates Renesas' exclusive video codec engine that supports new video compression formats and achieves twice the video playback performance of the R-Car H2.
The R-Car H3 also incorporates enhanced safety features for a more robust start-up protection process, as well as protection against external cyber-attacks.
The H3 R-Car offers a dramatic improvement in performance at the functional and system level, making it possible to use the R-Car H3 for a long period of time.
3) Availability of SiP Modules with External Memory to Reduce Design Workload:
SiP modules support high-speed external DDR memory interface design with the R-Car H3. As the connection speed between the SoC and DDR memory increases, and the number of signal lines grows, the PCB design workload and complexity also increase. This has become a significant issue for system manufacturers. By developing modules with an SoC connected to the DDR memory, Renesas is reducing the workload, PCB costs, and associated design complexities. In addition to the SoC and DDR memory, the modules include initial serial flash memory, required for booting. This means that design tasks from boot through DDR memory operation can be eliminated, and system manufacturers adopting the R-Car H3 can reduce their design workload and risks.
The new R-Car H3 maintains a high level of software compatibility with the other existing R-Car family SoCs: the R-Car H2, R-Car M2, and R-Car E2. The R-Car H3 will maintain high-level software scalability for the third-generation R-Car family.
Availability:
Samples of the R-Car H3 are now available. Mass production is scheduled to begin in March 2018 and is expected to reach a volume of 100,000 units by March 2019. (Availability is subject to change without notice.)
