(1) an AI accelerator based on a dynamically reconfigurable processor (DRP) that efficiently processes lightweight AI models and (2) heterogeneous architecture technology that enables real-time processing through cooperatively operating processor IPs, such as the CPU. Renesas produced a prototype AI-MPU integrated with these technologies and confirmed its high-speed, low-power operation. It achieved processing speeds up to 16 times faster (130 TOPS) than before the introduction of these new technologies, and world-class energy efficiency (up to 23.9 TOPS/W with a 0.8V supply).
Amid the recent proliferation of robots in factories, logistics, healthcare, and retail, there is a growing need for systems that can operate autonomously in real time by sensing their environment using advanced vision AI. Given the severe restrictions on heat generation, particularly for embedded devices, AI chips require both higher performance and lower power consumption.
The technologies developed by Renesas are as follows:
An AI accelerator that efficiently processes lightweight AI models.
As a typical technology to improve AI processing efficiency, pruning is available to omit calculations that do not affect recognition accuracy. However, it is common for AI models to contain calculations that do not affect recognition accuracy randomly. This creates a gap between the parallelism of the hardware processing and the randomness of the pruning, making the processing inefficient.
To solve this problem, Renesas optimized its unique DRP-based AI accelerator (DRP-AI) for pruning. By analyzing how the characteristics of the pruning pattern and a pruning method relate to recognition accuracy in typical image recognition AI models (CNN models), we identified the hardware structure of an AI accelerator that can achieve both high recognition accuracy and an efficient pruning rate, and applied it to the DRP-AI design. Furthermore, software was developed to reduce the size of the AI models optimized for this DRP-AI. This software converts the random pruning model configuration into highly efficient parallel computing, resulting in faster AI processing. In particular, Renesas' highly flexible pruning support technology (N:M flexible pruning technology), which can dynamically change the number of cycles in response to changes in the local pruning rate in the AI models, allows for precise control of the pruning rate based on the energy consumption, operating speed, and recognition accuracy required by users.
This technology reduces the number of AI model processing cycles to as little as one-sixteenth of that required for incompatible models and consumes less than one-eighth of the energy.
Heterogeneous architecture technology enables real-time processing for robot control.
Robotic applications require advanced vision AI processing for recognizing the surrounding environment. Meanwhile, judging and controlling robot movement requires detailed programming of conditions in response to environmental changes, making CPU-based software processing more suitable than AI-based processing. The challenge has been that current CPUs with embedded processors are not fully capable of controlling robots in real time. This is why Renesas introduced a dynamically reconfigurable processor (DRP), which handles complex processing in addition to the CPU and AI accelerator (DRP-AI). This led to the development of a heterogeneous architecture technology that enables higher speeds and lower power consumption in AI-MPUs by appropriately distributing and parallelizing processes.
A DRP executes an application while dynamically changing the circuit connection configuration between the arithmetic units within the chip for each operating clock cycle, according to the processing details. Since only the necessary arithmetic circuits operate, even in complex processes, lower power consumption and higher speeds are possible. For example, SLAM (simultaneous localization and mapping), a typical robotics application, is a complex setup requiring multiple programming processes for robot position recognition in parallel with environmental recognition using visual AI processing. Renesas demonstrated the operation of this SLAM by instantaneously switching programs with the DRP and running the AI accelerator and CPU in parallel, resulting in operating speeds approximately 17 times faster and approximately 12 times greater operating energy efficiency than the integrated CPU alone.
verified the operation
by creating a prototype test chip with these technologies and confirmed that it achieved world-class energy efficiency of 23.9 TOPS per watt with a standard supply voltage of 0.8V for the AI accelerator and operational energy efficiency of 10 TOPS per watt for the main AI models. It also demonstrated that AI processing is possible without a fan or heatsink.
These results help address the heat generation caused by increased power consumption, which has been a challenge associated with implementing AI chips in various embedded devices, such as service robots and automated guided vehicles. Significantly reducing heat generation will contribute to the expansion of automation in diverse industries, such as robotics and smart technology markets. These technologies will be applied to Renesas' RZ/V series MPUs for machine vision applications.
