The next generation of Silicon Labs' Si534x "clock-tree-on-a-chip" product line includes high-performance clock generators and highly integrated multi-PLL jitter attenuators. These ultra-low jitter timing devices on a single chip combine clock synthesis and jitter attenuation functionality to reduce the cost and complexity of optical networks, wireless infrastructure, broadband access/aggregation, Carrier Ethernet, test and measurement, and enterprise/data center equipment, including routers, switches, servers, and storage.
Silicon Labs' Si5347/46/45/44/42 jitter attenuators and Si5341/40 clock generators provide a configurable I2C platform with a combination of frequency translation capabilities and industry-leading jitter performance.
Simplify Clock Trees with ClockBuilder Pro.
With Silicon Labs' Si534x family and new ClockBuilder Pro software, configuring high-performance clocks has never been easier or faster. ClockBuilder Pro is designed to help system designers quickly and easily create custom Si534x clocks for their applications. This user-friendly software integrates the equivalent of over 150 engineer-years of Silicon Labs' DSPLL® timing technology and application expertise to simplify clock tree design and accelerate time to market. Using the intuitive ClockBuilder Pro GUI, designers can quickly generate sophisticated device configurations in under five minutes, minimizing software development overhead.
Silicon Labs' companion app, ClockBuilder Go, for mobile devices further simplifies the design process. System designers can quickly reactivate their clock tree designs on their smartphones and tablets, leveraging Silicon Labs' built-in frequency planning algorithms to synthesize virtually any clock frequency. ClockBuilder Go is available now for iOS mobile devices, with Android support coming later this year.
