Higher efficiency at higher speeds and improved system power density. The devices leverage a unique cascode SiC FET technology in which a normally-on SiC JFET is packaged together with a silicon MOSFET to produce a normally-off SiC FET. The FETs reduce the inductance of the compact internal connection loops, which, along with the included Kelvin source connection, reduces switching loss, enabling higher frequency operation and improved system power density. The FETs are optimized for applications such as onboard chargers, software-switched DC/DC converters, battery charging, and IT/server power supplies.

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