The platform combines Microchip's dsPIC33AK digital signal controllers and TA100 CryptoAuthentication security circuitry with Navitas GaNFast power transistors.
Designed for 800 VDC rack power distribution architectures, it comes with reference hardware, software, and documentation to facilitate evaluation and integration.
Direct 800VDC to 6VDC Conversion:
The design proposes performing the transformation from the 800VDC bus to 6VDC in a single converter.
According to the companies, this approach allows combining the stages that, in another architecture, would perform successive conversions from 800VDC to 50VDC and from 50VDC to 6VDC.
The information provided attributes an improvement in overall efficiency to this reduction in stages, although it does not provide a quantitative comparison against an equivalent 800V-50V-6V architecture.
The platform is designed within the context of adopting higher-voltage distribution systems to power racks with high-power GPU clusters.
Target 96% efficiency at full load.
The design's power board (PDB) incorporates 16 Navitas NV6034 GaNFast FETs, specified for 650 V and 17 mΩ.
The transistors are arranged in a stacked half-bridge topology on the primary side.
The design target stated by the companies is to achieve 96% efficiency at full load, operating at a switching frequency of 1 MHz.
The platform also targets a power density of 2,100 W/in³.
These figures should be treated as reference design targets, as the text does not present them as final results of independent characterization or production.
The NV6034 uses an 8 × 8 mm DFN package with dual -sided cooling. This design facilitates heat dissipation from the device and reduces its thermal resistance compared to configurations with a single main heatsink. The press release links this feature to the ability to operate at higher power levels, although it does not provide thermal resistance values or a quantified thermal comparison.
Digital Control Using dsPIC33AK:
Power conversion control is based on Microchip's dsPIC33AK digital signal controllers.
Specifically, the dsPIC33AK256MPS306 family incorporates a 32-bit core running at 200 MHz, a floating-point unit, and PWM modulators with a specified resolution of 78 ps.
It also features several 12-bit analog-to-digital converters capable of operating at speeds up to 40 MSPS.
These resources are intended for real-time control of high-frequency DC-DC conversion.
TA100 for Authentication and Secure Boot:
The platform also incorporates Microchip's TA100 CryptoAuthentication chip to implement hardware-based security functions.
This component can be used as a root of trust for functions such as code authentication, secure boot, MAC code generation, and firmware update protection.
It also supports various key management mechanisms and TLS-related operations.
The text also notes the availability of libraries compatible with post-quantum cryptographic algorithms associated with CNSA Suite 2.0, along with hardware-accelerated cryptographic functions.
It's important to distinguish these security capabilities from the dsPIC's functions: the dsPIC33AK is primarily responsible for digital power control, while the TA100 provides the hardware foundation for cryptographic and trust functions.
800VDC Rack Architecture:
The reference design is geared towards the transition to higher-voltage power architectures in data centers with AI computing workloads.
Using an 800VDC bus allows for the transmission of a given power using less current than with lower-voltage buses, which can reduce resistive losses and conductor requirements in certain designs. The final result, however, depends on the complete distribution and conversion architecture.
The platform includes a reference board, software, and documentation so developers can evaluate the 800VDC to 6VDC conversion architecture and adapt it to data center power systems. TA100 for authentication and secure boot
