This sixth generation of 3D Flash memory stands out for its advanced architecture, going beyond the conventional 8-level staggered memory array and achieving up to 10% greater density in the lateral cell arrays compared to the fifth generation technology. This advancement in lateral scaling, along with the 162 stacked layers of vertical memory, results in a 40% reduction in array size compared to the 112-layer stacking technology, thus optimizing costs.
The KIOXIA and Western Digital teams also implemented under-die CMOS localization and four-plane operation; these decisions, combined, result in a nearly 2.4x improvement in program performance and a 10% improvement in read latency compared to the previous generation. I/O performance is also improved by 66%, enabling this next-generation interface to support the growing demand for faster transfer rates.
Overall, the new 3D Flash memory technology reduces the cost per bit and increases the number of bits manufactured per wafer by 70% compared to the previous generation. KIOXIA and Western Digital continue to drive innovation to ensure continuous scaling that meets the needs of customers and their diverse applications.
