Furthermore, space offers the possibility of implementing highly secure quantum protocols that are difficult to implement using fiber optic networks.

Quantum Key Distribution (QKD) provides a relevant example of how space enables new ways to improve security and reliability. This technology can greatly enhance the ability to protect any communication against eavesdropping by providing a secure way to send one-time or limited-use encryption keys. Free-space optical channels protect the quantum entanglement necessary for QKD to function over distances greater than those possible with terrestrial fiber optics.

The free-space optical networks being built in space will also provide alternative routes for international communications, offering protection against sabotage and damage to submarine and buried fiber optic cables. The most advanced satellites will incorporate sophisticated computing systems to help monitor conditions on Earth, while others will act as space-based data centers.

Space-based systems are much more difficult to physically attack. But satellites are vulnerable in various ways. Cyberattacks remain a possibility. That's why it's essential to protect the electronics inside the growing number of strategically important satellites against failure. The consequences of a failure in space extend far beyond economic losses. A damaged or deteriorating satellite can disrupt global communications, navigation, weather monitoring, or military operations.

Satellite electronics are exposed to other events: a constant environment of highly energetic particles emitted by distant stars and quasars. These cosmic ray particles are often joined by high-energy protons produced by the Sun during periodic magnetic storms. Objects in orbit lack the protection of Earth's atmosphere and, in higher orbits, risk encountering even more of these particles as they travel through and above the magnetosphere. If one of these particles strikes an atom in one of the electronic components inside a satellite, the result is a trail of ions and free electrons that can disrupt the operation of circuits.
Some particles are so energetic that they can cause a device to fail through latch-up effects. But problems more commonly manifest as single-event upsets (SEUs), in which enough charge builds up in the circuit to reverse the state of a register or a DRAM or SRAM cell. All these elements rely on charge accumulation to change state.

The use of error correction codes (ECC), along with memory scrubbing, allows for mitigating the inevitable consequences of space-based SEUs. However, devices that depend on these types of memory for circuit control and configuration are particularly vulnerable, as they cannot utilize the same level of software-based correction.

Satellite designers want to use configurable logic devices, such as field-programmable gate arrays (FPGAs), for several reasons. FPGAs offer the ability to implement high-speed, custom hardware processing for the production volumes of satellite projects. Even large constellations rarely justify the non-recurring engineering costs required to develop application-specific integrated circuits (ASICs).
It's not just a matter of production volume. FPGAs provide the flexibility that today's satellite projects need. Their reconfigurability enables on-site programmability, which facilitates prototyping and design validation. By allowing custom circuitry, designers can build highly optimized data paths that improve computing performance in the intensive arithmetic operations required for artificial intelligence and machine learning.

Furthermore, FPGAs support the possibility of making changes to the circuitry after launch, although careful planning is required to ensure safety.
SRAM-based FPGAs face specific problems with SEUs. Unlike transient bit changes in registers and memory cells used by software programs, a system update unit (SEU) affecting a configuration cell will disrupt the logical connectivity within the FPGA. Designers must address these issues at the architectural level.

Configuration alterations can typically be fixed by reconfiguring or resetting the FPGA and do not have lasting effects. However, configuration alterations can create illegal conditions within the FPGA. If left uncorrected, they can cause pull-ups and pull-downs to activate simultaneously. Alternatively, they can lead to severe bus conflicts, which can physically damage the FPGA.
To protect against the effects of SEUs, FPGA-based designs using SRAM must employ expensive modular triple redundancy combined with debugging techniques to mitigate the risk of circuitry changes under an SEU. Without extensive redundancy, a single SEU can cause catastrophic failure due to the change in circuit configuration and, consequently, functionality. Non-volatile memory technologies, such as Flash, are much less vulnerable to the effects of SEUs. Although Flash memory operates by storing charge, it is far more resistant to radiation-induced bit changes than the SRAM used in some FPGAs. This resilience translates into fewer SEUs and greater resistance to permanent damage caused by critical ionizing radiation.

Fig. 2. Microchip PolarFire RT FPGA

Modern non-volatile FPGAs, such as those in Microchip's PolarFire and RT PolarFire families, demonstrate immunity to SEU configurations exceeding a linear energy transfer (LET) threshold of 80 MeV·cm²/mg and a total ionizing dose tolerance exceeding 100 krad. This resilience enables extended missions in orbits subjected to high densities of energetic particles, such as those traversing the Van Allen belts.

Extreme thermal conditions compound the challenge posed by ambient conditions. In orbit, satellites typically alternate between intense solar radiation, which raises the system's ambient temperature, and large temperature drops during eclipses. Flash devices consume significantly less power than their SRAM-based counterparts. Devices that combine radiation tolerance with inherently low static and dynamic power consumption simplify thermal designs by minimizing heat dissipation.
Beyond environmental factors, protection against cyberattacks targeting the communications system is essential. Cybersecurity must be designed from the silicon level up. Although protocols like QKD allow for the highest level of protection against eavesdropping, attackers will always target the weakest link in the chain. That means attempting to compromise the underlying systems.
Modern radiation-tolerant FPGAs integrate layered hardware protections that establish both operational trust and cyber resilience. A hardware root of trust ensures that only authenticated and untampered bitstreams are loaded when the system powers on. This mechanism prevents malicious configurations or the insertion of Trojan horse code.

Integrated bitstream encryption, using dedicated cryptographic accelerators, maintains confidentiality and integrity during both storage and transmission. Authentication methods implemented by the FPGAs ensure that intercepted configuration data cannot be used to reverse engineer internal circuitry.
These features enable mission designers to create procedures for authenticated updates in the field. As threats increase, ranging from attempts to compromise supply chains to persistent remote attacks, these protections maintain system integrity—critical requirements for long-duration or autonomous missions.

Cryptography itself will take advantage of reconfigurability. As quantum computing matures, older cryptographic systems become vulnerable. Implementing programmable hardware cryptographic engines within FPGAs positions them to support evolving post-quantum standards. This helps ensure long-term mission capability.

Implementing hardware security helps meet government cybersecurity requirements. Using FPGAs that natively implement secure boot, encryption, and radiation resistance ratings can significantly reduce certification complexity while aligning with NIST (National Institute of Standards and Technology) and DoD (Department of Defense) guidelines for cybersecurity compliance in space.

Fig. 3. Edge computing in orbit is driving demand for safe and radiation-tolerant FPGAs

Compliance with military-grade standards provides an added guarantee. Devices certified to Qualified Manufacturers List (QML) Class Q and Class V standards undergo a rigorous selection process according to MIL-STD-883 to ensure their durability against radiation and extreme thermal conditions. Microchip's approach also includes offering radiation-tolerant devices in cost-optimized, pin-compatible ceramic and plastic packages. This allows designers to prototype using plastic-packaged components before transitioning to ceramic packages for flight units. The flexibility of FPGAs accelerates design cycles and reduces non-recurring engineering costs, benefiting both small satellite developers and large space programs seeking proven guarantees.

The intersection of physical resilience and cybersecurity is at the forefront of space-grade electronics. Radiation-resistant FPGAs enable both requirements to be met. These devices withstand the harsh environment of orbit and attacks from Earth or other satellites through digital defenses. By combining radiation immunity, hardware-guaranteed reliability, and ultra-low power operation, these devices enable the creation of durable and secure spacecraft. This design philosophy extends beyond space to defense, energy, and critical infrastructure systems that need to ensure consistent operation under adverse conditions and can offer high resistance to digital attacks.

By Minh Nguyen, Senior Technical Staff Engineer, FPGA Product Marketing, Microchip Technology Inc. – https://www.microchip.com