With the launch of the Cyclone V family, Altera completes the commercialization of its 28nm custom product portfolio, offering a wide variety of devices—from the highest bandwidth to the lowest power consumption—to meet the design needs of every customer. The Cyclone V family
is based on TSMC's 28LP (28-nm Low Power) process, which delivers the low power consumption, lower cost, and optimal performance required by today's high-volume, cost-sensitive applications. The family reduces total power consumption by up to 40% and static power consumption by up to 30% compared to the previous generation. The Cyclone V FPGAs offer the lowest power-consuming serial transceivers, with a power consumption of 88 mW per channel at 5 Gbps and a throughput exceeding 4,000 MIPS at under 1.8 W. Furthermore, the family integrates numerous hardware IP blocks, such as hardware memory controllers supporting 400 MHz DDR3 memory and multi-function PCI Express Gen2 hardware IP blocks, providing engineers with differentiation and reducing system costs, power consumption, and design time. To protect valuable IP investments, the family also includes comprehensive design protection through features such as 256-bit AES (Advanced Encryption Standard) with both volatile and non-volatile keys.

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