The I8500 is designed for scaling, storage, automotive, industrial, and communications infrastructure applications, and has been developed to meet the demands of the AI ​​supercycle and the growth of Physical AI.
"As AI moves from the data center to the physical environment, platforms require far more advanced real-time data orchestration capabilities than traditional processors can offer," said Sameer Wasson, CEO of MIPS. "The I8500 marks the evolution of our proven data movement architecture into the open era of RISC-V ISA, delivering performance, efficiency, and design freedom for next-generation AI solutions."

The MIPS i8500 incorporates a third-generation scalable multithreaded architecture with four threads per core and support for multi-cluster deployments, enabling up to 24 threads per cluster.
The processor provides deterministic, low-latency data movement with built-in security, ideal for orchestrating packet flows between accelerators and enabling intelligent communication between compute blocks, carriers, and networks.
Its energy-efficient design ensures optimal performance in edge AI workloads. Furthermore, compatibility with the RVA23 profile, along with support for Linux and real-time operating systems (RTOS), ensures software portability and alignment with the RISC-V ecosystem.

“The MIPS I8500 represents a strategic and timely advancement for embedded and edge computing,” commented Steven Dickens, CEO and founder of HyperFRAME Research. “The combination of scalable multithreading, deterministic performance, and secure data orchestration directly addresses the growing need for real-time and event-driven processing in markets such as automotive, industrial automation, and communications infrastructure. MIPS is positioning itself as a leader in enabling physical AI at the silicon level.”

MIPS I8500 Processor Application Examples
: • High-Speed ​​Data Orchestration: Fast, rule-based packet classification, essential for Smart NICs, DPUs, and network processors in data centers and telecom networks.
• Ready for Industrial IoT and Automation: Local protocol processing and routing for workloads requiring real-time control, prioritization, and security.
• Secure and Scalable Data Movement: Deterministic data handling, critical for AI-driven predictive maintenance and diagnostics.
• Flexible and scalable architecture: Ideal for 5G/6G and edge computing environments, with multi-core and multi-cluster configurations that optimize performance.
• Dynamic management, encryption, and quality of service (QoS): Enables dynamic traffic management, data encryption, and QoS control, maintaining secure communications through programmable channels.

The Atlas Explorer Core model of the MIPS I8500 is now available for customer evaluation, enabling hardware and software co-design to accelerate development cycles and reduce time to market.

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