These third-generation CHiL devices offer efficiency characterization features such as phase shutdown and variable gate control with enhanced algorithms like PID scaling (for phase shutdown) and phase current balancing to ensure maximum efficiency. The solution's architecture supports the extremely high di/dt transients characteristic of high-end processors, and thanks to the new Adaptive Transient Algorithm (ATA), these transients can be controlled with fewer phases and capacitors to minimize system size.
The new CHiL digital PWM controllers offer a 30% reduction in operating current to help meet efficiency targets with small loads. For high-end circuit protection, the devices offer enhanced pulse-by-pulse current limiting and pulse-width control with a new phase imbalance and phase loss fault protection feature.
The devices fully support phase doubling using IR's IR3598 to control two phases from each PWM output. They also detect 12V, 5V, and 3.3V sources without special sequencing and incorporate PMBUS telemetry.
When designed in conjunction with IR's DirectFET® power MOSFETs and PowIRstage® integrated devices, the CHiL product line enables smaller-sized solutions by combining the density advancements of DirectFET and PowIRstage. The inherently digital nature of these devices allows for extremely low pin count solutions in a 0.4mm pitch QFN package with improved transient response, eliminating at least one bulky SP capacitor and numerous ceramic capacitors to deliver the smallest and most efficient solution.
