TI's DRV835x drivers utilize a Smart Gate Drive (SGD) architecture to reduce the number of external components typically required for MOSFET protection and slew speed control circuitry. The SGD architecture also optimizes dead time to prevent tripping conditions, provides flexibility to reduce electromagnetic interference (EMI) through MOSFET slew speed control, and protects against gate short-circuit conditions via VGS monitors. The drivers provide optional integrated current shunt amplifiers to support various motor control schemes and a buck regulator to power either the gate driver or an external controller. A robust gate pulldown circuit helps prevent parasitic dV/dt gate turn-on events.

The DRV835x drivers are compatible with the DRV8353Rx-EVM-15A driver evaluation modules, three-phase BLDC drive stages based on the DRV8353RH or DRV83583RS gate driver, and TI CSD88599Q5DC NexFET™ power blocks. The evaluation modules feature individual DC bus and phase voltage sensing, as well as individual LS (low-side) current shunt amplifiers, making them ideal for sensorless BLDC algorithms.

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