Unlike consumer electric vehicles, which prioritize range per charge, other transportation use cases may have different priorities that are addressed through APU improvements. For example, passenger space is very important in light rail, as headroom allows for more paying passengers. Field reliability is paramount for mining vehicles, where downtime is measured in millions of dollars per day. And in all use cases, passenger comfort is critical in a market served by competitive OEMs targeting demanding customers.
The high switching losses of silicon IGBTs have hindered improvements in transportation APUs. By limiting the switching frequency, IGBTs fix the minimum size of the APU's largest physical components: the isolation transformer and the heatsink. With SiC, the size of the isolation transformer can be drastically reduced by switching at higher frequencies; and with switching losses reduced by 80% or more, heatsinks can be reduced in size as well. Furthermore, the APU's switching frequencies can extend beyond the audible range, eliminating the high-pitched whine that is annoying to passengers. Finally, efficiency is essential because the APU operates continuously, often under light loads; the conduction losses of SiC MOSFETs are lower than those of competing IGBTs under light load conditions.
Is SiC Up to the Task?
The resilience of SiC MOSFETs under a wide range of conditions is essential for APUs powering both comfort and emergency loads. It is necessary to verify: 1) the stability of the MOSFET gate oxide, a known issue for SiC MOSFETs; 2) the gate oxide lifetime; 3) the stability of the MOSFET body diode; and 4) fault resilience measures, such as avalanche resistance and short-circuit survival.
Gate Oxide Integrity:
If the threshold voltage shifts, the device performance changes (e.g., the turn-on resistance increases), leading to erratic system behavior and potential APU failure. Figure 1 shows how the Vth data for production-type SiC MOSFETs should not show any significant change after 1000 h of stress at 175°C.
Figure 1. Threshold voltage of production-type SiC MOSFETs before and after high-temperature (left) and positive (right) gate bias voltage.
The gate oxide lifetime can be predicted by accelerating samples to failure using elevated temperature and electric field. The turn-on energy is extracted for each failure mode, and an Arrhenius equation is used to extrapolate the oxide lifetime (see Figure 2). The gate oxide of a production-grade SiC MOSFET can last well over 100 years at high voltage, ensuring confidence in the routine and reliable operation of the APU beyond its designed lifespan.
Figure 2. Example of the extrapolated lifetime of the oxide of Microchip's production-grade SiC MOSFET.
Body Diode Stability:
Unlike the IGBT, the SiC MOSFET can conduct reverse current using its intrinsic body diode. In some devices, this diode degrades over time, resulting in an increase in RDSon and more heat than designed. Figure 3 shows the body diode's IV curves and the MOSFET's ON-state drain-source resistance (RDSon) after many hours of constant forward voltage [1]. A large variation was observed between different vendors. One vendor experienced marked degradation; another became unusable. The selected devices should not show any perceptible change. Using a SiC MOSFET with a stable body diode improves reliability and reduces cost by eliminating the antiparallel diode.
Figure 3. RDSon before and after voltage of commercially available SiC MOSFETs, revealing the different intrinsic body diode quality from three suppliers [1].
Field Survival: Short Circuit and Avalanche
Transport APUs are susceptible to a wide variety of failures, requiring SiC MOSFETs to be designed to safely withstand these events and maintain consistent performance before and after failures.
Short-circuit withstand capability measures a MOSFET's ability to survive an instantaneous short circuit of the DC link across its drain-source terminals. MOSFET channels are enhanced, allowing a properly designed device to safely distribute peak currents across the MOSFET die area. Figure 4 shows the short-circuit withstand times (SCWT) of production SiC MOSFETs; the Microchip example ranges from 3 to 14 microseconds and depends on the DC link voltage and the applied VGS. This is sufficient for many commercially available gate drivers. An advanced driver, such as the one described in the next section, adds intelligence to short-circuit detection.
Figure 4. Short-circuit withstand time for production SiC MOSFETs.
Avalanche withstand is even more demanding: the load current is suddenly poured into the MOSFET, forcing the drain-source voltage to rise to breakdown. Unlike in a short circuit, the MOSFET channels are not enhanced; the avalanche current overloads the die edge, rapidly driving the device to its thermal limits.
Repetitive unclamped inductive switching (R-UIS) is used to evaluate a device's avalanche withstand. Figure 5 shows the dielectric breakdown time (TDDB) of commercial SiC MOSFETs before and after 100,000 R-UIS cycles. Many vendors maintain the oxide withstand, but the ability to test up to four times the withstand, along with stability in RDSon and drain-source leakage [2], reinforces the ability of SiC MOSFETs to safely traverse the most demanding electrical overload conditions.
Figure 5. Time-dependent dielectric breakdown before and after a repetitive avalanche failure for commercially available SiC MOSFETs from four vendors.
Faster Switching with Low-Inductance Packages.
Combined with high edge ratios, problematic inductances in a power system lead to increased switching losses, excessive overflow voltages, non-compliant EMI, and potentially APU failures. The preventative measures designers must take to reduce MOSFET speeds can make them wonder what happened to the value proposition of SiC.
Microchip's low-inductance SP6LI package illustrates how these problems can be solved. The phase stage configuration inserts less than 3 nanohenries of parasitic inductance into the power loop. Internally, design optimizations have been made to ensure identical timing and current sharing. Thermal performance can be improved with the use of silicon nitride ceramic (aluminum nitride is also offered), and baseplate options include copper and AlSiC. Externally, the power terminals allow for a low-inductance connection to the DC link and optimal paralleling in two orientations. The SP6LI enables designers to drive SiC MOSFETs at higher speeds with maximum efficiency and reduced EMI, downsizing APUs while avoiding EMI-related failures.
Gate Drivers Keep APUs on Track.
APU performance and reliability can also be optimized using programmable digital gate drivers that allow precise adjustment of overflow voltage and switching losses on the fly. This enables APU designers to reduce APU cost and size with lower voltage components and smaller heatsinks, and eliminate hours of labor with a soldering iron and a bucket of gate resistors.
The impact of augmented switching can be seen in Figure 6. Unlike conventional turn-off (left), augmented turn-off starts with a 20 V turn-on voltage, moves to a user-programmed intermediate level for a specified dwell time, and finally to the -5 V turn-off state. The effects are modest due to the exceptionally low inductance of the SP6LI; results showing a more pronounced influence have been reported elsewhere [2,3]. In addition, short-circuit events stop quickly, reducing peak voltage and current by 60% and 10%, respectively (Figure 7).
Figure 6. Graphical user interface for the programmable AgileSwitch™ door controller and shutdown waveforms using (left) conventional switching and (right) augmented switching.
Figure 7. Demonstration of how augmented switching (right) can reduce peak voltage and current during a short-circuit event compared to conventional switching (left).
Total SiC System Solution
Designers looking to accelerate from dual-pulse evaluation to mass production will need accelerated development kits that unify the three components of a total SiC system solution for transport APUs: rugged SiC power devices, a low-inductance power package, and an intelligent gate driver. Figure 8 shows how Microchip's solution can be incorporated into an APU circuit.
Figure 8: Proposed implementation of Microchip's ASDAK+ full-bridge phase-shift in the DC-DC section of a transport APU. [4]
Abstract:
The use of SiC MOSFETs in auxiliary power units for transportation vehicles offers disruptive advantages over silicon IGBTs with respect to APU size, weight, efficiency, and noise. However, these advantages can only be achieved with high field reliability by using robust SiC MOSFETs, a low-inductance package, and a gate driver intelligent enough to take advantage of the SiC's agile performance. Designers can now address transportation APU design challenges with complete SiC system solutions that simultaneously reduce the size, noise, and field failures of transportation APUs.
References
[1] Agarwal, A. and Kang, M., private communication, 2020.
[2] Speer, K., Satheesh, N., Kashyap, A., and Bontemps, S., “Streamlined SiC Development With a Total System Solution,” IEEE Power Electronics Magazine, Vol. 28-35, 2020.
[3] Satheesh, N., Robins, C., and Fender, A., “The State of Intelligent SiC MOSFET Gate Drivers,” Bodo's Power Systems, pp. 30-33, February 2018.
[4] Satheesh, N., “Silicon carbide MOSFETs: Handle with care,” in Proc. Applied Power Electronics Conference (APEC), San Antonio, Texas, USA, 2018.
[5] Hayashiya, H. and Kondo, K., “Recent Trends in Power Electronics Applications as Solutions in Electric Railways,” IEEJ Transactions on Electrical and Electronic Engineering, vol. 15: 632-645, 2020.
Author: By Kevin Speer, Nitesh Satheesh and Marc Rommerswinkel, Microchip Technology
